Memory Tension Technology Co., Ltd. and the Shangtang Technology installation team jointly announced that they have successfully achieved the industry's first PD separation commercial inference cluster with “memory-computation-scheduling” integration as the core on a domestic GPGPU cluster, and it operates stably in a real production environment. According to test data, the comprehensive reasoning cost ratio of the solution reached 150% of the Nvidia A100 of the same generation, marking the first time that domestic computing power systems have system-level competitiveness in commercializing large models. This breakthrough has found a differentiated breakthrough path for the domestic computing power ecosystem. PD separation was upgraded from hardware optimization to a memory center design paradigm. In the memOS system, the separation architecture can be extended to higher dimensions such as behavior prediction, context planning, and memory layout, and becomes an integral part of the overall architecture. This also heralds that the C-side scenario has officially entered the “memory reasoning” era.

Memory Tension Technology Co., Ltd. and the Shangtang Technology installation team jointly announced that they have successfully achieved the industry's first PD separation commercial inference cluster with “memory-computation-scheduling” integration as the core on a domestic GPGPU cluster, and it operates stably in a real production environment. According to test data, the comprehensive reasoning cost ratio of the solution reached 150% of the Nvidia A100 of the same generation, marking the first time that domestic computing power systems have system-level competitiveness in commercializing large models. This breakthrough has found a differentiated breakthrough path for the domestic computing power ecosystem. PD separation was upgraded from hardware optimization to a memory center design paradigm. In the memOS system, the separation architecture can be extended to higher dimensions such as behavior prediction, context planning, and memory layout, and becomes an integral part of the overall architecture. This also heralds that the C-side scenario has officially entered the “memory reasoning” era.